The present invention relates to a storage system including a common bus and a plurality of kinds of groups of packages which can be maintained without system power being turned off when a failed package is replaced and more particularly to a magnetic disk subsystem in which each package can be replaced for the common bus as the system is kept operable or hot.
In a computer system which is used for plant control or a financial system at present, nonstop operation thereof is required. However, in a conventional computer system, when an error occurs in a part of the system, it is necessary to turn the system power off at least once so as to execute a recovery operation. To run the system nonstop, it is necessary to replace or maintain the part where an error occurs without the power of system being turned off.
There is an application regarding the hot replacement art for realizing such nonstop maintenance. Japanese Patent Application Laid-Open No. Heisei 5-175678, discloses an electronic device having a plurality of packages connected to a common bus, a controller installed outside the packages controls a bus buffer which is a connection circuit of the packages and common bus at the time of replacement of the packages and separates the packages logically from the common bus. Concretely, the art makes the impedance of the connection part of the bus buffer and common bus high.
To run a computer system nonstop, it is effective to use an art for enhancing the reliability of the whole system, that is, to use a fault tolerance system which comprises a plurality of redundant systems. Japanese Patent Application Laid-Open No. Hesei 3-266011 dicloses such prior art namely, a system consisting of a plurality of redundant systems in which the parts other than the interfaces of the redundant systems are operated by independent clocks for each redundant system.
The electronic device indicated in Japanese Patent Application Laid-Open No. Heisei 5-175675 controls hot replacement and diagnosis of a plurality of packages intensively by a specific controller in the device. As a result, when a failure occurs in the controller, the system cannot be maintained nonstop. Only an art for separating the bus buffer logically from the common bus, that is, an art for separating the packages from a data system bus for transmitting data is indicated. Therefore, the effect on the whole system is not taken into account.
In Japanese Patent Application Laid-Open No. Heisei 3-266011, a system which allows an operation by an independent clock for each redundant system is indicated. However, replacement of each redundant system during running of the system without affecting the operation of the system is not taken into account.